⚡ 本页包含 AI 生成的分析内容，仅供参考
该论文提出一种集成了TIA、前馈均衡器和直接反馈判决反馈均衡器的100Gb/s PAM-4光接收机，采用28nm CMOS工艺，实现了-8.3dBm的灵敏度。解决了传统分立式BiCMOS TIA与ADC+DSP SerDes方案功耗高的问题，为数据中心的低成本高速光互连提供了集成解决方案。
g. 400G-DR4/FR4) have been developed to address the rapid increase in interconnect BW demand created by data-centric computing [1]. Low-cost 100Gb/s PAM-4 optical transceivers are critical to spur their adoption in high volume by data centers. While low-cost integrated silicon-photonic 100Gb/s PAM-4 transmitters have been demonstrated recently, the electronics in current receiver solutions is more disaggregated. They typically employ a standalone BiCMOS TIA IC followed by a 100G PAM-4 (ADC+DSP)-based SerDes IC (designed to equalize highloss electrical channels), which results in higher power dissipation and package cost. To address these drawbacks, we present a 100Gb/s PAM-4 optical RX with a singlechip solution integrating all of the RX electronics in a bulk CMOS process. While
Integrated TIA, FFE and Direct-Feedback DFE in 28nm CMOS
Hao Li, Jahnavi Sharma, Chun-Ming Hsu, Ganesh Balamurugan, James Jaussi Intel, Hillsboro, OR Several 400G Ethernet standards (e