A Programmable Neural-Network Inference Accelerator Based on Scalable In-Memory Computing operations occur in the dedicated NMC BPBS SIMD module, which is optimized for 1-to-8b weights/activations, and further programmable element-wise operations (e.g., arbitrary activations functions) occur in the NMC CMPT SIMD module.

📋 论文概要

该论文提出了一种基于可扩展内存计算的可编程神经网络推理加速器，通过可配置的内存计算单元（CIMU）和软件指令库，支持神经网络层的时间与空间映射，从而提升硬件利用率并降低状态复制开销。

💡 主要创新点

• 提出了可编程内存计算单元（CIMU）架构，结合软件指令库实现灵活的时间和空间映射。
• 支持大规模神经网络层的空间映射（循环展开），避免了典型复制策略中的状态加载开销。
• 通过可扩展的高密度/并行内存计算实现多种映射选项，优化硬件利用率。

🏷 关键词

📄 原文摘要

Jinseok Lee, Naveen Verma Figure 15.1.3 shows a sample of the operations enabled by CIMU configurability and the SW instruction libraries. In addition to temporal mapping of NN layers, the architecture provides extensive support for spatial mapping (loop unrolling). Given the high HW density/parallelism of IMC, this provides a range of mapping options for HW utilization, beyond typical replication strategies, which incur excessive state-loading overheads due to state replication across engines. To support spatial mapping of NN layers, various approaches for receiving and sequencing input activations for IMC computation are shown, enabled by configurability in the input and shortcut buffers, including: (1) high-bandwidth inputting for dense layers; (2) bandwidth-reduced inputting and line buffering for convolutional layers; (3) feed-forward and recurrent inputting, as well as output-element computation, for memory-augmented layers; (4)

👥 作者与机构

Hongyang Jia, Murat Ozatay*, Yinqi Tang*, Hossein Valavi*, Rakshit Pathak*,