⚡ 本页包含 AI 生成的分析内容,仅供参考
本文提出了一种基于单端电流检测放大器(CSA)的可编译8T SRAM,采用7nm FinFET工艺,工作频率达6.2 GHz。该设计利用多米诺读操作,实现了小面积和高性能的嵌入式存储器,解决了传统SRAM在高速与面积之间的权衡问题。
Uma Srinivasan1, Matthew Hyde3, Otto Torreiter1, Michael Kugel1, Dan Radko3, Hyong Kim3, Daniel Friedman2 IBM, Boeblingen, Germany IBM Research, Yorktown Heights, NY 3 IBM, Poughkeepsie, NY 1 2 8T SRAM, using domino read, is preferred for small-size and high-performance arrays
Alexander Fritsch1, Rajiv Joshi2, Sudipto Chakraborty2, Holger Wetter1,