A 3nm Gate-All-Around SRAM Featuring an Adaptive Dual-BL and an Adaptive Cell-Power Assist Circuit

📋 论文概要

该论文提出了一种采用3nm环绕栅极（GAA）技术的SRAM，通过自适应双位线（Adaptive Dual-BL）和自适应单元电源辅助电路（Adaptive Cell-Power Assist Circuit）来克服金属电阻增加对SRAM裕度的影响，从而提升SRAM性能。

💡 主要创新点

• 提出自适应双位线技术，动态调整位线电压以补偿金属电阻引起的信号衰减。
• 引入自适应单元电源辅助电路，根据操作条件调节单元电源电压，增强读写稳定性。

🏷 关键词

📄 原文摘要

TaeJung Lee, Geumjong Bae, Dong-Won Kim, SD Kwon, Sanghoon Baek, Jonghoon Jung, Jongwook Kye, Hakchul Jung, Hyungtae Kim, Soon-Moon Jung, Jaehong Park Samsung Electronics, Hwaseong, Korea Advanced technologies help to improve SRAM performance via recent transistor breakthroughs [1], which allow SRAM designers to focus on handling metal resistance by alleviating device performance impediments. Since SRAM margins are more vulnerable to the increasing metal resistance, due to smaller critical dimensions, SRAMassist circuits are proposed to overcome the impact of metal resistance in recent technologies [2-5]. One of the challenges is the design limitation such as the quantized transistor, which requires SRAM-assist to optimize SRAM margins. In this paper, gateall-around (GAA) SRAM design techniques are proposed, which improve SRAM margins more freely, in addition to power, performance, and area (PPA). Moreover, SRAM-assist

👥 作者与机构

Taejoong Song, Woojin Rim, Hoonki Kim, Keun Hwi Cho, Taeyeong Kim,