A 25MHz-BW 75dB-SNDR Inherent Gain Error Tolerance Noise-Shaping SAR-Assisted Pipeline ADC with Background Offset Calibration

📋 论文概要

本文提出了一种具有固有增益误差容忍度的噪声整形SAR辅助流水线ADC，通过背景失调校准技术抑制动态功率放大器的增益误差，实现了25MHz带宽和75dB SNDR。该设计避免了传统闭环动态放大器高速困难、数字放大器需低噪声比较器等缺点。

💡 主要创新点

• 提出一种固有增益误差容忍的噪声整形SAR辅助流水线架构，无需显式增益误差校准。
• 集成背景失调校准技术，有效抑制动态放大器的失调影响，提升线性度。
• 结合噪声整形与流水线结构，在低过采样比下实现高分辨率ADC。

🏷 关键词

📄 原文摘要

Instituto Superior Tecnico/University of Lisboa, Lisbon, Portugal 1 2 To suppress the gain error from dynamic-power amplifiers, recently presented approaches including gain-error shaping (GES) [1], digital amplifiers [2] and closedloop dynamic amplifiers [3] are promising alternatives for calibrations. However, due to the high gain and stability requirements, it is difficult to run the closed-loop dynamic amplifier [3] at high speed. The digital amplifier [2] calls for a low-noise comparator, which is both power-inefficient and high-speed unfriendly. The GES shapes the interstage gain (ISG) error of the SAR-assisted pipeline ADC into high frequencies [1]. Nevertheless, its extra 1st stage DAC and digital error feedback significantly confines the overall pipelined speed. Rather than a dedicated effort to handle the ISG error, this paper explores an architectural approach that inherently tolerates it. We incorporate together

👥 作者与机构

Hongshuai Zhang1, Yan Zhu1, Chi-Hang Chan1, R. P. Martins1,2

University of Macau, Macau, China