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该论文提出了一种结合N-path滤波与噪声整形SAR的带通ΔΣ ADC,实现了79dB SNDR和167dB FoM。通过采用顶板采样、断开CDAC与非线性输入电容的开关以及浮动逆变放大器拓扑,解决了线性度、功耗和共模反馈问题。
For simplicity of design, this work uses top-plate sampling. To improve its linearity, 2 switches are used to disconnect CDAC from the nonlinear input capacitance of the comparator and the dynamic amplifier (DA) during the input tracking phase [5]. After tracking, the ADC performs 10b SAR conversion. Then, the residue is amplified by the DA. This work adopts the floating inverter amplifier (FIA) DA topology [6]. It achieves 2× current reuse and provides a high gain. Moreover, because the DA is powered by a floating reservoir capacitor, CB, it does not need any CMFB circuit and maintains a constant output common-mode voltage against variations in the input common-mode voltage and PVT. In the proposed BPDSM, there are 2 merits to use residue preamplification before integration: 1) it prevents signal charge loss on the sampling capacitor and maintains the correct N-path filter operation; 2) it suppresses the noise
Linxiao Shen1,2, Zijie Gao3, Xiangxing Yang2, Wei Shi2, Nan Sun2,3