A 0.82mW 14b 130MS/s Pipelined-SAR ADC with a Distributed Averaging Correlated Level Shifting (DACLS) Ringamp and Bypass-Window Backend

📋 论文概要

本文提出了一种采用分布式平均相关电平移位（DACLS）环形放大器的14位130MS/s流水线逐次逼近型模数转换器，通过降低增益误差和减小输出负载来提升分辨率和带宽，同时实现了低功耗设计。

💡 主要创新点

• 提出分布式平均相关电平移位（DACLS）环形放大器，有效降低增益误差，提高ADC分辨率。
• 通过最小化环形放大器输出负载，扩展了ADC带宽，优于现有技术。
• 采用定制旁路窗口后端，进一步优化最后一级流水线性能。

🏷 关键词

📄 原文摘要

To fulfill upcoming communication specifications, it has become popular recently to employ pipelined-SAR architectures, incorporating residue amplifiers (RA) to achieve high resolution, wide bandwidth, and low-power ADCs [1,2]. Hence, the RA design plays an important role in the ADCs. In this work, a distributed averaging correlated level shifting (DACLS) ringamp is proposed to not only enhance the resolution by reducing the RA gain error, but also extend the bandwidth by minimizing the RA output load compared to prior arts [2-4]. In addition, a customized bypass-window backend for the last pipeline stage is applied for power reduction. Figure 10.2.1 shows the proposed 14b pipelined-SAR ADC including a frontend 6b SAR ADC, a 32× RA, and a backend 9b SAR ADC with 1b inter-stage redundancy. The timing diagram of the 14b ADC is shown at the bottom-left of Fig. 10.2.1. For the frontend, reference swapping (RS) [4] and detect-and-skip (DAS) [5] techniques are applied to

👥 作者与机构

Jia-Ching Wang, Tai-Haur Kuo

National Cheng Kung University, Tainan, Taiwan