A 22nm 4Mb STT-MRAM Data-Encrypted Near-Memory Computation Macro with a 192GB/s Read-and-Decryption Bandwidth and 25.1-55.1TOPS/W 8b MAC for AI Operations

📋 论文概要

本文提出了一款基于22nm工艺的4Mb STT-MRAM数据加密近存计算宏，实现了192GB/s的读取和解密带宽，解决了AI边缘设备中非易失性存储与数据加密结合的计算效率问题。

💡 主要创新点

• 首次在STT-MRAM中集成数据加密功能，实现近存计算，提升安全性。
• 通过优化读取路径和解密电路，达到192GB/s的高带宽，兼顾能效（25.1fJ/b）。
• 在22nm节点下实现4Mb容量，适用于电池供电的AI边缘设备。

🏷 关键词

📄 原文摘要

Fu-Chun Chang1, Yuan Wu1, Yu-An Chien1, Fang-Ling Hsieh1, Chung-Yuan Li1, Guan-Yi Lin1, Po-Jung Chen1, Tsen-Hsiang Pan1, Chung-Chuan Lo1, Win-San Khwa2, Ren-Shuo Liu1, Chih-Cheng Hsieh1, Kea-Tiong Tang1, Chieh-Pu Lo2, Yu-Der Chih2, Tsung-Yung, Jonathan Chang2, Meng-Fan Chang1,2 National Tsing Hua University, Hsinchu, Taiwan TSMC, Hsinchu, Taiwan 1 2 *Equally Credited Authors (ECAs) Nonvolatile computing-in-memory (nvCIM) [1-4] is ideal for battery-powered tiny artificial intelligence (AI) edge devices that require nonvolatile data storage and low system-level power consumption. Data encryption/decryption (data-ED) is also required to prevent access to the neural network (NN) model weights and the personalized data used to improve inference accuracy. This paper presents an AI nvCIM data-ED-capable macro with high energy efficiency (EFMAC), a low macro-level read latency (tAC-M), a high read bandwidth (R-BW), and high-precision inputs (IN), weights (W), and outputs (OUT)

👥 作者与机构

Yen-Cheng Chiu*1, Chia-Sheng Yang*1, Shih-Hsin Teng1, Hsiao-Yu Huang1,