Single-Mode CMOS 6T-SRAM Macros with Keeper-LoadingFree Peripherals and Row-Separate Dynamic Body Bias Achieving 2.53fW/bit Leakage for AIoT Sensing Platforms

📋 论文概要

本文设计了一种单模式CMOS 6T-SRAM宏单元，采用无keeper负载的外围电路和行分离动态体偏置技术，实现了超低待机功耗，适用于微型化无线物联网传感器节点。该设计有效降低了SRAM在待机模式下的漏电流，从而延长电池寿命。

💡 主要创新点

• 提出无keeper负载的外围电路设计，消除了传统keeper电路的漏电路径，显著降低静态功耗。
• 采用行分离动态体偏置技术，根据行选择信号动态调整NMOS和PMOS的体偏压，进一步优化待机功耗与性能。
• 实现单模式操作（仅一种工作模式），简化了控制逻辑，避免模式切换带来的额外功耗和延迟。

🏷 关键词

📄 原文摘要

Advanced Institute of Information Technology of Peking University, Hangzhou, China 1 2 Miniaturized wireless IoT sensor nodes stay mostly in their standby mode and wake up periodically to sense and store a small amount of data. To maximize battery life, the acquired data is usually accumulated in SRAM before being transmitted; requiring economic on-chip memory solutions with ultra-low standby power. Artificial-intelligenceof-things (AIoT) based sensing platforms aim to extend this concept further by using on-chip neural networks (NN) to detect valid events at the edge node; further reducing network traffic and overall power consumption by limiting the transmission of invalid events [1]. This edge intelligence has created an ever-increasing demand for on-chip

👥 作者与机构

Yihan Zhang1, Chang Xue1, Xiao Wang1, Tianyi Liu1, Jihang Gao1, Peiyu Chen1,

Jinguang Liu2, Linan Sun2, Linxiao Shen1, Jiayoon Ru1, Le Ye1,3, Ru Huang1 Peking University, Beijing, China Nano Core Chip Electronic Technology, Hangzhou, China 3