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ISSCC 2022Session 2 · PROCESSORSDigital Processors5nm

A 5nm 3.4GHz Tri-Gear ARMv9 CPU Subsystem in a Fully Integrated 5G Flagship Mobile SoC

⚡ 本页包含 AI 生成的分析内容,仅供参考

📋 论文概要

该论文介绍了一款采用5nm工艺的Tri-Gear ARMv9 CPU子系统,集成于5G旗舰移动SoC中,通过避免使用低阈值电压器件来降低泄漏功耗并扩展核心的可用电压频率范围,实现了3.4GHz的高频运行。

💡 主要创新点

核心指标
3.4GHz
工艺节点
5nm
重要性
发表年份
ISSCC 2022

🏷 关键词

ARMv9Tri-Gear5nmCPU子系统低功耗

📄 原文摘要

Anand Rajagopalan1, Gordon Gammie1, Ramu Madhavaram1, Madhur Jagota1, CJ Chung1, Jenny Wiedemeier1, Bala Meera1, Chao-Yang Yeh2, Maverick Lin2, Curtis Lin2, Vincent Lin2, Jiun Lin2, YS Chen2, Barry Chen2, Cheng-Yuh Wu2, Ryan ChangChien2, Ray Tzeng2, Kelvin Yang2, Achuta Thippana1, Ericbill Wang2, SA Hwang2 devices, avoiding any lower-VT devices, thereby reducing leakage power and extending the useable range of the BP core to lower voltage and frequency. Figure 2.5.4 shows the silicon measurement of Vmin vs. yield data collected from >1000 dies for the HP core demonstrating robust yield at 3.4GHz. MediaTek, Austin, TX; 2MediaTek, Hsinchu, Taiwan To enhance the capability of the on-die power supply monitoring, a high-bandwidth peak low detection capability is introduced which measures the lowest voltage of rapid supply voltage droops. Conventional data converters need to sample and convert at a multi-GHz

👥 作者与机构

Ashish Nayak1, HsinChen Chen1, Hugh Mair1, Rolf Lagerquist1, Tao Chen1,

分类:Digital Processors · 年份:ISSCC 2022