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本文提出了一种基于VCO的3阶噪声整形ADC，采用伪虚拟地前馈线性化技术，在低功耗下实现了高精度。该设计解决了传统ΔΣ ADC在先进工艺节点中高性能放大器设计困难的问题，适用于物联网和分布式传感器节点。
The rise of the internet-of-things and distributed sensor nodes with machine-learning and edge processing are driving the need for low-power, high-precision ADCs. These highly digital systems are best implemented in advanced process nodes that have low intrinsic gain and low supply voltages, making the design of the high-performance amplifiers required in high-precision delta-sigma (∆Σ) ADCs challenging. Time-domain ADC architectures, such as voltage-controlled oscillator (VCO)-based ADCs, have been explored to address these challenges as time-domain processing is agnostic to supply voltage and benefits from advanced process nodes with faster switching times [1]. However, linearity has been challenging as open-loop VCO-based ADCs have only ~50dB SFDR. As such, significant research has been devoted to the development of linearization techniques such as feedback [1], mixed-domain operation [2], digital calibration [3], and
Corentin Pochet, Drew A. Hall
University of California, San Diego, CA