A 16Gb 27Gb/s/pin T-coil based GDDR6 DRAM with

📋 论文概要

该论文提出了一款16Gb容量的GDDR6 DRAM，采用T-coil、合并MUX发射器、优化WCK操作和替代数据总线等创新技术，实现了27Gb/s/pin的数据速率。解决了高速DRAM接口中的信号完整性、功耗和频率覆盖范围等关键问题。

💡 主要创新点

• 采用T-coil结构改善高频信号完整性，支持宽范围数据速率。
• 通过合并MUX发射器（Merged-MUX TX）降低功耗并提高信号质量。
• 优化WCK操作和引入替代数据总线（Alternative-Data-Bus）以增强时序裕量和数据吞吐效率。

🏷 关键词

📄 原文摘要

frequency. When LF_ON is low (LF_ONB is high), the CML resistance and its current changes in the opposite direction and the center frequency is close to 12GHz (24Gb/s). As a result, the proposed frequency divider covers the sub-1Gb/s/pin to 27Gb/s/pin operating range. Daewoong Lee, Hye-Jung Kwon, Daehyun Kwon, Jaehyeok Baek, Chulhee Cho, Sanghoon Kim, Donggun An, Chulsoon Chang, Unhak Lim, Jiyeon Im, Wonju Sung, Hye-Ran Kim, Sun-Young Park, HyoungJoo Kim, Hoseok Seol, Juhwan Kim, Jungbum Shin, Kil-Young Kang, Yong-Hun Kim, Sooyoung Kim, Wansoo Park, Seok-Jung Kim, Chanyong Lee, Seungseob Lee, TaeHoon Park, ChiSung Oh, Hyodong Ban, Hyungjong Ko, Hoyoung Song, Tae-Young Oh, SangJoon Hwang, Kyung Suk Oh, JungHwan Choi, Jooyoung Lee The previous ZQ calibration method shown in Fig. 28.2.4(a) obtains pull-up (PU) and pull-down (PD) code from loop 1 and 2 without using a T-coil. However, when an I/O Tcoil is used the ZQ calibration needs to include T-coil impact as shown in Fig. 28.2.4(b);

👥 作者与机构

Merged-MUX TX, Optimized WCK Operation, and, Alternative-Data-Bus