⚡ 本页包含 AI 生成的分析内容，仅供参考
该论文提出了一种9-12GHz的耦合旋转行波振荡器（RTWO）FMCW全数字锁相环（ADPLL），用于解决FMCW雷达中短线性调频持续时间与低相位噪声之间的权衡问题。通过采用耦合RTWO结构，实现了97fs RMS抖动和-120dBc/Hz @1MHz偏移的相位噪声，同时支持12.5ns的快速回扫时间和2µs的线性调频时间。
Spain 1 2 At the center of autonomous driving and range and motion sensing in industrial and healthcare applications are FMCW RADARs, which provide the means for object range and velocity estimation. With future widespread use and availability of more bandwidth for RADAR systems, FMCW generators with short chirp duration and low phase noise will be important to reduce the RADAR doppler-induced range ambiguity and improve its resolution of close targets in multi-target environments. Due to the conflicting tradeoffs between bandwidth and low phase noise, PLLs with two-point modulation (TPM) are commonly used. The TPM architecture suffers from 2 main drawbacks: 1) In analog implementations [1,2], it requires a low-noise DAC to inject a modulation signal in the
Jitter, -120dBc/Hz PN at 1MHz Offset, and with Retrace Time, of 12.5ns and 2µs Chirp Settling Time
Hyman Shanan1, Declan Dalton2, Vamshi Chillara 3, Pablo Dato4 Analog Devices, Somerset, NJ Xilinx, Cork, Ireland 3 Vishay, Cork, Ireland 4 Bosch, Valencia,