A Single-Channel 2.6GS/s 10b Dynamic Pipelined ADC with Time-Assisted Residue Generation Scheme Achieving Intrinsic PVT Robustness

📋 论文概要

本文提出了一种单通道2.6GS/s 10位动态流水线ADC，采用时间辅助残差生成方案，实现了内在的PVT鲁棒性。该设计解决了流水线SAR ADC因串行量化导致的转换速率限制问题，适用于多GS/s中等分辨率单通道ADC需求。

💡 主要创新点

• 提出时间辅助残差生成方案，通过时间域处理加速残差生成，突破传统流水线SAR ADC的速率瓶颈。
• 采用动态流水线结构，结合内在PVT补偿机制，无需额外校准即可在工艺、电压、温度变化下保持性能。

🏷 关键词

📄 原文摘要

Yan Zhu1, Chi-Hang Chan1, R. P. Martins1,3 University of Macau, Macau, China Xidian University, Xi’an, China 3 Instituto Superior Tecnico/University of Lisboa, Lisbon, Portugal 1 2 A highly integrated wireline receiver with advanced modulation schemes desires multiGS/s medium-resolution single-channel ADCs with a compact area for mass interleaving. Pipelined SAR ADCs have drawn a lot of attention for their great energy efficiency [1]; however, their conversion rate is still limited due to the serial conversion feature of the SAR quantizer. Benefiting from the highly digital structure with a decent area, timedomain (TD) pipelined ADCs [2] can be a promising alternative. While their competitiveness is reduced when sub-stage resolution is >4b, due to the exponentially increased power and area overhead in the TD flash architecture. To reach an overall 10b target, adding more stages together with high-performance inter-stage amplifiers is

👥 作者与机构

Junyan Hao1,2, Minglei Zhang1, Yanbo Zhang1,2, Shubin Liu2, Zhangming Zhu2,