Crystalline Oxide Semiconductor-based 3D Bank Memory System for Endpoint Artificial Intelligence with Multiple Neural Networks Facilitating Context Switching and Power Gating the maximum frequency. Energy for inference (MNIST) using only the CPU memory and the core is 1681.97µJ, whereas energy for inference using the ACC is 0.19µJ. The inference time is reduced from 3.55s to 485µs. Therefore, our ACC enables inference according to the frame rate of imaging data (e.g., 60fps and 16ms).

📋 论文概要

该论文提出了一种基于晶体氧化物半导体的3D存储体系统，用于端点人工智能，通过堆叠OS存储器和CMOS电路实现上下文切换和功耗降低。与传统的SRAM芯片相比，该方案在推理任务中显著降低了待机功耗。

💡 主要创新点

• 采用晶体氧化物半导体（OS）存储器堆叠在CMOS电路上，形成3D存储体架构，实现非易失性存储和低功耗。
• 通过上下文切换和功率门控（PG）技术，在推理任务中实现比传统SRAM芯片更低的待机功耗。

🏷 关键词

📄 原文摘要

Masashi Fujita1, Munehiro Kozuma1, Yoshinori Ando1, Yoshiyuki Kurokawa1, Toru Nakura2, Shunpei Yamazaki1 The effect of power reduction when performing context switching and PG is compared between an OS/Si chip and a Si (SRAM) chip, as shown in Fig. 13.1.4. The OS/Si chip is fabricated by stacking only one layer of OS memory on a CMOS circuit. The Si chip does not use OS and the ACC consists of PEs and SRAM. Since the SRAM is volatile memory, the Si chip reduces standby power by clock gating (CG). The power of these chips is estimated under intermittent operations in which the inference is performed while switching two NNs, and then, PG (CG) is performed. The OS/Si and Si chips (estimated based on the SRAM generator) can only retain data for one NN in the ACC memory. Thus, every inference requires weight data rewriting. The stacked OS/OS/Si process enables instant context switching and results in low power by allocating the time for PG. At room

👥 作者与机构

Yuto Yakubo1, Kazuma Furutani1, Kouhei Toyotaka1, Haruki Katagiri1,