Subtractive Photonic Waveguide-Coupled Photodetectors in 180nm Bulk CMOS

📋 论文概要

该论文提出在180nm体CMOS工艺中实现减法光子波导耦合光电探测器，解决了当前硅光子学工艺（SOI）成本高或缺乏有源电子电路的问题。通过将光子器件直接集成到标准CMOS中，实现了低成本、高集成度的光电-电子系统，适用于复杂成像、光互连和自校正光子电路等领域。

💡 主要创新点

• 首次在180nm体CMOS工艺中实现波导耦合光电探测器，无需昂贵的SOI衬底，降低了制造成本。
• 采用减法制造方法，在标准CMOS后端工艺中集成光子波导和探测器，兼容现有电子电路。
• 实现了光子与电子器件的单片集成，为复杂光电子系统提供了可扩展的低成本平台。

🏷 关键词

📄 原文摘要

The integration of electronics and photonics into a single silicon CMOS process can serve wide-ranging applications, e.g. complex imaging and projection photonic systems, onchip optical interconnects, or self-correcting photonic circuits. Current silicon photonics processes built using silicon on insulator (SOI) are either optimized for the photonic devices with no active electronic circuitry available [1] or are relatively expensive [2]. Bulk CMOS processes can be modified to accommodate photonics [7], but currently no commercial foundry offers this option to customers, and an ideal integration method would enable photonics on any bulk CMOS node. Previous attempts to integrate photonics into unmodified bulk CMOS processes, using the polysilicon gate layer for waveguiding, have resulted in large waveguide losses [3][4]. The absorption loss coefficient (α) of silicon grows by roughly ten orders of magnitude

👥 作者与机构

Craig Ives, Ali Hajimiri

California Institute of Technology, Pasadena, CA