A Digital Low-Dropout (LDO) Linear Regulator with Adaptive Transfer Function Featuring 125A/mm2 Power Density and Autonomous Bypass Mode

📋 论文概要

该论文提出了一种适用于CPU的数字低压差线性稳压器（DLDO），采用自适应传递函数，实现了125A/mm²的高功率密度，解决了动态工作条件下VIN、VOUT和负载电流瞬变导致的VMIN依赖性问题。

💡 主要创新点

• 提出自适应传递函数数字控制，优化瞬态响应和稳定性
• 实现125A/mm²的高功率密度，满足CPU级供电需求
• 通过数字架构降低VMIN对VIN的依赖，减少测试时间和性能损失

🏷 关键词

📄 原文摘要

grouped and share a common power supply per group. A combination of a common supply with per-domain DVFS implies a need for local voltage regulation, which in some SOCs is based on LDOs. Operation conditions feature dynamically variable VIN, VOUT, ILOAD transients, and a variety of decoupling solutions. Such usage conditions usually cause VMIN to depend on VIN, which translates into cost (test-time increase) and/or power/performance (VMIN guard bands) penalties. In this paper, we report on a CPU-grade digital LDO (DLDO) that supports adequate (to CPU performance requirements) power densities and mitigates VMIN dependency on the input voltage. The DLDO was implemented in a 10nm process node, as part of a multi-domain SOC. High-level power-plane partitioning is shown in Fig. 14.3.1 (top). Figure 14.3.1 (bottom) illustrates the high-level DLDO block scheme.

👥 作者与机构

Michael Zelikson, Kosta Luria, Lior Gil, Yuval Brown, Vadim Goldenbeg,

Dor Kasif, Elias Hlees, Alex Vinichuk Intel, Haifa, Israel Modern CPUs feature multiple power domains, most of which are