A Nonvolatile AI-Edge Processor with 4MB SLC-MLC Hybrid-Mode ReRAM Compute-in-Memory Macro and 51.4-251TOPS/W

📋 论文概要

该论文提出了一种非易失性AI边缘处理器，集成了4MB SLC-MLC混合模式ReRAM计算内存宏，实现了51.4-251TOPS/W的高能效。解决了低功耗AI边缘设备在断电模式下需要快速唤醒和低能耗响应的问题。

💡 主要创新点

• 提出SLC-MLC混合模式ReRAM计算内存宏，兼顾存储密度和计算精度。
• 实现非易失性AI边缘处理器，支持快速唤醒和低能耗事件触发计算。
• 达到51.4-251TOPS/W的能效范围，适用于边缘AI应用。

🏷 关键词

📄 原文摘要

Yun-Chen Lo1, Chuan-Jia Jhang1,2, Hung-Hsi Hsu1, Yu-Hsiang Chin1, Yu-Chiao Chen1, Chung-Chuan Lo1, Ren-Shuo Liu1, Kea-Tiong Tang1, Chih-Cheng Hsieh1, Yu-Der Chih3, Tsung-Yung Chang3, Meng-Fan Chang1,2 National Tsing Hua University, Hsinchu, Taiwan TSMC Corporate Research, Hsinchu, Taiwan, 3TSMC, Hsinchu, Taiwan *Equally Credited Authors (ECAs) 1 2 Low-power AI edge devices should provide short-latency (TWK-RP) and low-energy (EWK-RP) wakeup responses from power-off mode to handle event-triggered computing tasks with high inference accuracy (IA), which requires high-capacity nonvolatile memory (NVM) to store high-precision weight data in power-off and high bit-precision multiplyand-accumulate (MAC) operations with high energy efficiency. SRAM computing-in-memory (CIM) and digital processors suffer large EWK-RP and long TWK-RP due to the movement of weight data from off-chip NVM to the on-chip buffer and

👥 作者与机构

Wei-Hsing Huang*1, Tai-Hao Wen*1,2, Je-Min Hung*1, Win-San Khwa*2,