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ISSCC 2023Session 25 · RF TRANSCEIVER BUILDING BLOCKSRF & Wireless

A 4b RFDAC at 8GS/s for FMCW Chirps with 4GHz Bandwidth in 10µs

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📋 论文概要

该论文提出了一种4位分辨率、8GS/s采样率的射频数模转换器(RFDAC),用于在10微秒内生成具有4GHz带宽的FMCW线性调频信号。该设计解决了传统PLL频率合成在实现快速、宽带线性调频时的局限性。

💡 主要创新点

核心指标
4位分辨率,8GS/s采样率,4GHz带宽,10µs chirp时间
重要性
发表年份
ISSCC 2023

🏷 关键词

RFDACFMCW雷达线性调频8GS/s4GHz带宽

📄 原文摘要

Niels Christoffers1, Christoph Wagner1, Thorsten Brandt1, Andreas Stelzer2 Infineon Technologies, Linz, Austria Johannes Kepler University, Linz, Austria 1 2 A frequency-modulated continuous-wave (FMCW) radar is highly reliant on frequency chirps as transmit signals that are linear, fast, and wide in bandwidth in order to achieve the high resolution of both the target distance as well as the target velocity. To generate such chirps, current radar transceivers predominantly employ phase-locked-loop (PLL)based frequency synthesis where frequency modulation is implemented by controlling the feedback-divider frequency ratio, e.g., by means of a delta-sigma fractional-N PLL or an all-digital PLL (ADPLL) [1,2], or the modulation is done by a direct digital frequency synthesizer (DDFS), the output of which becomes the PLL reference frequency [3]. Inherently, these respond slowly and inaccurately to dynamic modulation inputs. PLLs

👥 作者与机构

Soumya Krishnapuram Sireesh1,2, Sanaz Hadipour Abkenar1,2,

分类:RF & Wireless · 年份:ISSCC 2023