A 32Gb/s/pin 0.51pJ/b Single-Ended Resistor-less Impedance-Matched Transmitter with a T-Coil-Based Edge-Boosting Equalizer in 40nm CMOS

📋 论文概要

本文提出一种32Gb/s/pin、0.51pJ/b的单端无电阻阻抗匹配发射机，通过PN-over-NP驱动器实现面积缩减，并采用基于T线圈的边缘增强均衡器，在不消耗静态电流的情况下提升信号质量。

💡 主要创新点

• 提出PN-over-NP驱动器结构，无需电阻即可实现阻抗匹配，显著减小芯片面积。
• 设计基于T线圈的边缘增强均衡器，在无序列跳变时不消耗静态电流，实现低功耗均衡。

🏷 关键词

📄 原文摘要

demand, the DRAM interface bandwidth also increases steeply each year; for graphics applications, the bandwidth per pin has increased to 27Gb/s/pin, thanks to T-coils implemented using RDL layers [1]. As I/O hardware expands, its area and power consumption are also increasing. To alleviate the DRAM interface burden two key ideas are proposed in this paper: (1) a PN-over-NP driver capable of impedance matching, without the use of a resistor, significantly reduces the chip area, and; (2) a T-coil-based edge-boosting equalizer, which does not consume static current when there no sequence transition, that enables impedance matching at high frequencies. In addition, a CMOS clock-edge corrector is introduced to reduce clock skew. As a result, the proposed transmitter achieves 32Gb/s, while maintaining high

👥 作者与机构

Jung-Hun Park1, Hyeonseok Lee1, Hoyeon Cho1, Sanghee Lee1,

Kwang-Hoon Lee1, Han-Gon Ko2, Deog-Kyoon Jeong1 Seoul National University, Seoul, Korea ONEsemiconductor, Gyeonggi, Korea 1 2 To cope with the rapidly growing data