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ISSCC 2023Session 29 · DIGITAL ACCELERATORS AND CIRCUIT TECHNIQUESDigital Circuits

CCSA: A 394TOPS/W Mixed-Signal GPS Accelerator with Charge-Based Correlation Computing for Signal Acquisition

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📋 论文概要

本文提出了一种基于电荷相关计算的混合信号GPS加速器CCSA,用于信号捕获。通过电荷耦合计算实现高能效的乘法累加操作,达到了394TOPS/W的能效。

💡 主要创新点

核心指标
394TOPS/W
重要性
发表年份
ISSCC 2023

🏷 关键词

混合信号GPS加速器相关计算电荷域高能效

📄 原文摘要

the amount of transferred charge as ∆Qc,k=Cc∙[∆Vnc,k+(1/2∙VDD–Vm)], which is indeed proportional to the Lk%Rk product. Jieyu Li1, Weifeng He1, Bo Zhang2, Liang Qi1, Guanghui He1, Mingoo Seok2 The charges that all mixed-signal multipliers transfer onto the global output wire are immediately redistributed, forming the output voltage Vm = 1/2∙VDD + 1/4∙VDD∙[Cc/(4096∙Cc+Cpar)]∙[4096+C(m)], where Cpar is the parasitic capacitance of the global output wire. This formula confirms the linear relationship between Vm and C(m). Inspecting this formula, we find it is critical to minimize Cpar since a large Cpar will reduce the voltage swing of Vm, thereby increasing the ADC’s resolution requirement. To reduce Cpar, we place the coupling capacitor (Cc) at the edge of each PE to physically separate it from digital circuits of the PE (Fig. 29.7.3 top left). Then, we place 16 PEs in an 8×2 subarray such that we can have the 16 capacitors in the middle of the sub-array, again

👥 作者与机构

capacitor (Cc). Following the well-known capacitor coupling equation, we can formulate

分类:Digital Circuits · 年份:ISSCC 2023