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ISSCC 2023Session 29 · DIGITAL ACCELERATORS AND CIRCUIT TECHNIQUESDigital Circuits40nm CMOS

A Sub-0.8pJ/b 16.3Gbps/mm2 Universal Soft-Detection Decoder Using ORBGRAND in 40nm CMOS

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📋 论文概要

该论文实现了一种基于ORBGRAND算法的通用软检测解码器,在40nm CMOS工艺上达到了低于0.8pJ/b的能量效率和16.3Gbps/mm2的面积效率,解决了短长度、高码率码的低延迟、高能效和高带宽解码需求。

💡 主要创新点

核心指标
sub-0.8pJ/b, 16.3Gbps/mm2
工艺节点
40nm CMOS
重要性
发表年份
ISSCC 2023

🏷 关键词

ORBGRAND软检测解码短码高码率低功耗解码器

📄 原文摘要

Kevin Galligan3, Muriel Medard2, Ken R. Duffy3, Rabia Tugce Yazicigil1 Boston University, Boston, MA Massachusetts Institute of Technology, Cambridge, MA 3 Maynooth University, Maynooth, Ireland 1 2 Many modern communication applications demand strict latency bounds, high energy efficiency, and high bandwidth, for which only short-length, high-rate codes are suitable. Ordered Reliability Bits Guessing Random Additive Noise Decoding (ORBGRAND) is a recently proposed universal near maximum likelihood (ML) decoding algorithm [1] that can decode all short-length and high-rate codes and for which several hardware architectures have been proposed [2-3]. Those designs focused primarily on obtaining high-throughput performance at the expense of significant resource utilization. This work presents the first-integrated universal soft-detection decoder using ORBGRAND implemented in 40nm CMOS technology featuring: 1) ultra-low energy consumption of

👥 作者与机构

Arslan Riaz1, Alperen Yasar1, Furkan Ercan1, Wei An2, Jonathan Ngo1,

分类:Digital Circuits · 年份:ISSCC 2023