A 22nm 832Kb Hybrid-Domain Floating-Point SRAM In-Memory-Compute Macro with 16.2-70.2TFLOPS/W for High-Accuracy AI-Edge Devices

📋 论文概要

该论文提出一种基于22nm工艺的832Kb混合域浮点SRAM存内计算宏单元，通过融合浮点计算与存内计算架构，解决了AI边缘设备中能效与精度难以兼顾的问题。

💡 主要创新点

• 采用混合域浮点计算方式，在保持高精度的同时显著提升能效至16.2-70.2 TFLOPS/W
• 在22nm工艺节点实现832Kb大容量SRAM存内计算宏，适用于高精度AI边缘推理

🏷 关键词

📄 原文摘要

Chih-Han Chien1, Ho-Yu Chen1, Chao-En Ke1, Hsu-Ming Hsiao2, Sih-Han Li2, Shyh-Shyuan Sheu2, Wei-Chung Lo2, Shih-Chieh Chang2, Chung-Chuan Lo1, Ren-Shuo Liu1, Chih-Cheng Hsieh1, Kea-Tiong Tang1, Meng-fan Chang1 National Tsing Hua University, Hsinchu, Taiwan Industrial Technology Research Institute, Hsinchu, Taiwan *Equally Credited Authors (ECAs) 1 2 Advanced artificial-intelligence (AI) edge devices require high energy-efficiency (ηE) and high inference-accuracy [2,4-6]. An SRAM-based compute-in-memory (CIM) based on MAC operations is well-suited for improving the ηE of AI edge devices. However, without support for floating-point (FP) computation, AI chips using integer-based SRAM-CIMs (INT-CIM) [2,4-5] are prone to precision loss when applied to complex datasets or neural network models. Product (PD = IN × W) alignment-based FP-MACs align the product’s mantissa (PDM) prior to accumulation, based on the product’s exponent (PDE). This

👥 作者与机构

Ping-Chun Wu*1, Jian-Wei Su*1,2, Li-Yang Hong1, Jin-Sheng Ren1,