A 64Gb/s/pin PAM4 Single-Ended Transmitter with a Merged Pre-Emphasis Capacitive-Peaking Crosstalk-Cancellation Scheme for Memory Interfaces in 28nm CMOS

📋 论文概要

本文提出了一种64Gb/s/pin PAM4单端发射机，采用合并预加重电容峰值串扰消除方案，旨在解决高密度并行通道中PAM4信号对串扰敏感的问题，提升信号完整性。

💡 主要创新点

• 提出了一种合并预加重电容峰值串扰消除方案，在不增加额外功耗的情况下同时实现预加重和串扰消除。
• 采用单端PAM4发射机架构，适用于高密度内存接口，提高了通道密度和传输速率。

🏷 关键词

📄 原文摘要

massive computing and AI technologies, the memory interface is critical to achieve higher computational throughput. Increasing the parallel-channel density is an effective solution to improve the throughput [1]. However, due to a reduced channel pitch, the crosstalk between adjacent lanes becomes severe and degrades signal integrity. Advanced DRAM applications, such as GDDR6x [2], have adopted PAM-4 signaling to increase transmission speed; unfortunately, PAM-4 is more sensitive to crosstalk. Various TX crosstalk cancellation (XTC) techniques have been reported [3-5], but these techniques mainly focus on NRZ. The de-emphasis FIR-based XTC (FIR-XTC) in [3] increases static power consumption and reduces the TX-output SNR. Phase predistortion is utilized in [4] to eliminate crosstalk; however, this method has limited

👥 作者与机构

Weitao Wu*, Hongzhi Wu*, Liping Zhong, Xuxu Cheng, Xiongshi Luo,

Dongfan Xu, Catherine Wang, Zhenghao Li, Quan Pan Southern University of Science and Technology, Shenzhen, China *Equally Credited Authors (ECAs) With the development of