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本文提出了一种25.2Gb/s/pin的NRZ/PAM-3双模发射器，通过嵌入式部分数据总线反转（DBI）技术，实现了133%的I/O带宽/引脚效率，解决了传统NRZ内存接口带宽受限的问题。
*Equally Credited Authors (ECAs) The demand for high-bandwidth data communication in various data-centric applications has increased significantly. It requires many repetitive data transfers between processing units and off-chip memories, owing to the limited memory I/O bandwidth. This results in a deterioration in system throughput and energy efficiency. Therefore, an energyefficient and high-bandwidth memory interface is required. NRZ signaling [1,2] is commonly used in memory interfaces; however, it is difficult to increase the I/O bandwidth beyond a certain point owing to on-chip bandwidth limitations. PAM-4 signaling [3,4] increases the I/O bandwidth by transmitting 2b in 1UI. However, PAM-4 signaling has a reduced signal-to-noise ratio (SNR), which deteriorates further as the power supply voltage is scaled down. PAM-3 signaling [5,6] can alleviate the above problems because it can achieve better SNR than PAM-4 signaling and a higher I/O
Chanheum Han*, Ki-Soo Lee*, Joo-Hyung Chae
Kwangwoon University, Seoul, Korea