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ISSCC 2024Session 14 · DIGITAL TECHNIQUES FOR SYSTEM ADAPTATION, POWER MANAGEMENT AND CLOCKINGDigital Circuits12nm

A 12nm Linux-SMP-Capable RISC-V SoC with 14 Accelerator

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📋 论文概要

该论文介绍了一款基于12nm工艺的RISC-V SoC,支持Linux对称多处理(SMP),并集成了14个加速器。通过分布式硬件电源管理和灵活的基于NoC的数据编排,解决了多核异构SoC的功耗与数据通信效率问题。

💡 主要创新点

工艺节点
12nm
重要性
发表年份
ISSCC 2024

🏷 关键词

RISC-VSoC加速器电源管理NoC

📄 原文摘要

Maico Cassel dos Santos*1, Tianyu Jia*2, Joseph Zuckerman*1, Martin Cochet*3, Davide Giri1, Erik Jens Loscalzo1, Karthik Swaminathan3, Thierry Tambe2, Jeff Jun Zhang2, Alper Buyuktosunoglu3, Kuan-Lin Chiu1, Giuseppe Di Guglielmo1, Paolo Mantovani1, Luca Piccolboni1, Gabriele Tombesi1, David Trilla3, John-David Wellman3, En-Yu Yang2, Aporva Amarnath3, Ying Jing4, Bakshree Mishra4, Joshua Park2, Vignesh Suresh4, Sarita Adve4, Pradip Bose3, David Brooks2, Luca P. Carloni1, Kenneth L. Shepard1, Gu-Yeon Wei2 Columbia University, New York, NY; 2Harvard University, Cambridge, MA IBM Research, Yorktown Heights, NY; 4University of Illinois, Urbana, IL *Equally Credited Authors 1 3 Modern heterogeneous SoCs feature a mix of many hardware accelerators and generalpurpose cores that run many applications in parallel. This brings challenges in managing how the accelerators access shared resources, e.g., the memory hierarchy,

👥 作者与机构

Types, Distributed Hardware Power Management and Flexible, NoC-Based Data Orchestration

分类:Digital Circuits · 年份:ISSCC 2024