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ISSCC 2024Session 15 · EMBEDDED MEMORIES & ISING COMPUTINGOther12nm FinFET

A 32Mb RRAM in a 12nm FinFet Technology with a 0.0249μm2

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📋 论文概要

本文提出一款采用12nm FinFET工艺的32Mb RRAM,通过0.0249μm²位单元实现高密度,并达到3.2GB/s读取吞吐量、10k次写入耐久性和10年保持能力,解决了低功耗物联网MCU对嵌入式非易失存储器的高性能需求。

💡 主要创新点

核心指标
32Mb容量, 0.0249μm²位单元, 3.2GB/s读吞吐量, 10k写耐久性, 10年保持
工艺节点
12nm FinFET
重要性
发表年份
ISSCC 2024

🏷 关键词

RRAM嵌入式非易失存储器12nm FinFET高密度位单元高读取吞吐量

📄 原文摘要

Yi-Cheng Huang, Shang-Hsuan Liu, Hsu-Shun Chen, Hsin-Chang Feng, Chih-Feng Li, Chou-Ying Yang, Wei-Keng Chang, Chang-Feng Yang, Chun-Yu Wu, Yen-Cheng Lin, Tsung-Tse Yang, Chih-Yang Chang, Wen-Ting Chu, Harry Chuang, Yih Wang, Yu-Der Chih, Tsung-Yung Jonathan Chang TSMC, Hsinchu, Taiwan Low-power wireless MCU devices for intelligent IoT applications are one of the key drivers for embedded non-volatile memory (eNVM) for technology nodes of 2xnm and beyond; in addition to high-performance advanced CMOS processes with excellent RF/analog devices, there is a need for high read throughput high-density embedded nonvolatile memory to store CPU code as well as neural-network models for energy-efficient data-centric machine-learning edge computing. For this purpose, fully logic-compatible TMO-based resistive RAM (RRAM) is a promising candidate [1-3]. In this work, a 32Mb RRAM macro with 0.0249μm2 bit cells is implemented using a 12nm ultra-low power

👥 作者与机构

Bit-Cell, a 3.2GB/S Read Throughput, a 10KCycle Write, Endurance and a 10-Year Retention at 105°C

分类:Other · 年份:ISSCC 2024