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ISSCC 2024Session 15 · EMBEDDED MEMORIES & ISING COMPUTINGOther22nm

A 22nm 10.8Mb Embedded STT-MRAM Macro Achieving over 200MHz Random-Read Access and a 10.4MB/s Write Throughput with an In-Field Programmable 0.3Mb MTJ-OTP for High-End MCUs

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📋 论文概要

本文提出了一款基于22nm工艺的10.8Mb嵌入式STT-MRAM宏,实现了超过200MHz的随机读取访问速度和10.4MB/s的写入吞吐量,旨在满足工业与物联网设备对高速信息处理和实时控制的需求,解决了传统嵌入式存储器在高速运算和安全性方面的瓶颈。

💡 主要创新点

核心指标
随机读取访问频率>200MHz,写入吞吐量10.4MB/s
工艺节点
22nm
重要性
发表年份
ISSCC 2024

🏷 关键词

STT-MRAM嵌入式存储器22nm工艺随机读取写入吞吐量

📄 原文摘要

Masayuki Izuna, Koichi Takeda, Yoshinobu Kaneda, Takahiro Shimoi, Hidenori Mitani, Takashi Ito, Takashi Kono Renesas Electronics, Tokyo, Japan As the range of applications for industrial and IoT devices expands, such as with the integration of AI, higher-speed information processing will be desired for endpoint devices to reduce network latency and power consumption, due to network communication with the cloud. For sophisticated control and real-time processing, highprocessing performance with GHz-class CPU clock frequencies and robust security is required in the crossover area located on the performance boundary between high-end microcontroller units (MCUs) and low-end microprocessor units (MPUs) [1]. One possible solution for such MCUs is to apply DVFS, which dynamically controls the supply voltage and the clock frequency depending on the processing load. In terms of process scaling, finer logic processes, 22 nm and beyond are being applied, but the development

👥 作者与机构

Tomoya Ogawa, Ken Matsubara, Yasuhiko Taito, Tomoya Saito,

分类:Other · 年份:ISSCC 2024