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ISSCC 2024Session 16 · SECURITY: FROM PROCESSORS TO CIRCUITSDigital Processors28nm CMOS

A 28nm 69.4kOPS 4.4μJ/Op Versatile Post-Quantum Crypto-Processor Across Multiple Mathematical Problems

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📋 论文概要

本文提出了一款28nm工艺的多用途后量子密码处理器,支持多种密钥封装机制和数字签名方案,解决了后量子密码迁移中硬件加速的通用性和能效问题。该处理器实现了69.4kOPS的吞吐量和4.4μJ/Op的能效。

💡 主要创新点

核心指标
69.4kOPS, 4.4μJ/Op
工艺节点
28nm CMOS
重要性
发表年份
ISSCC 2024

🏷 关键词

后量子密码密码处理器密钥封装机制数字签名28nm

📄 原文摘要

Jinjiang Yang1, Chen Chen1,2, Qichao Tao1,2, Guang Yang1,2, Aoyang Zhang1, Shaojun Wei1,2, Leibo Liu1,2 Tsinghua University, Beijing, China Beijing National Research Center for lnformation Science and Technology (BNRist), Beijing, China 3 Micro Innovation Integrated Circuit Design Co., Ltd, Wuxi, China 1 2 The migration towards post-quantum cryptography (PQC) is in progress to secure communications and transactions against the impending quantum threat, while three key-encapsulation mechanisms (KEM) and one digital signature (DS) scheme are being standardized by NIST [1]. This multi-year migration poses serious challenges to PQC implementations for compatibility and performance requirements in various scenarios and settings: 1) Performance limitations caused by diverse computation patterns and relatively higher computation costs. 2) Crypto-agility resulting from different mathematical problems, various security parameters, or even different standardization

👥 作者与机构

Yihong Zhu1,2, Wenping Zhu1,2, Yi Ouyang1, Junwen Sun1,2, Min Zhu3, Qi Zhao1,2,

分类:Digital Processors · 年份:ISSCC 2024