An 8b 160GS/s 57GHz Bandwidth Time-Interleaved DAC and Driver-Based Transmitter with Adaptive Calibration for 800Gb/s Coherent Optical Applications in 5nm

📋 论文概要

本文提出了一款8位160GS/s、57GHz带宽的时间交织DAC和基于驱动器的发射器，用于800Gb/s相干光通信。通过自适应校准技术解决了时间交织带来的失配问题，实现了高速高带宽的发射性能。

💡 主要创新点

• 采用时间交织架构实现160GS/s超高采样率，同时保持57GHz带宽
• 提出自适应校准算法，有效补偿时间交织通道间的失配，提升线性度
• 集成驱动器和DAC，优化了发射器整体性能，适用于800Gb/s相干光通信系统

🏷 关键词

📄 原文摘要

eq (1) F. Ahmad1, A. Mellati1, A. Fernandez2, A. Iyer 3, A. Fan1, B. Reyes 2, C. Abidin 1, C. Nani 4, D. Albano 4, F. Solis 2, G. Minoia 4, G. Hatcher 1, H. Carrer 2, K. Kota 1, L. Wang 1, M. Bachu 3, M. Garampazzi 4, M. Hassanpourghadi 1, N. Fan 1, P. Prabha 1, R. Nguyen 1, S. Ho5, T. Dusatko 5, T. Wu 1, W. Elsharkasy 1, Z. Sun6, S. Jantzi 1, L. Tse 3 Marvell, Irvine, CA Marvell, Cordoba, Argentina 3 Marvell, Santa Clara, CA 4 Marvell, Pavia, Italy 5 Marvell, Vancouver, Canada 6 Marvell, Singapore, Singapore 1 2 The consistent demand for high-speed wireline communication due to high-performance computing and most recently due to machine learning and artificial intelligence has driven the development of transmitters operating beyond 100Gb/s per lane [1-4] and optical modules operating beyond 400Gb/s [4]. High-speed wireline communication requires high-bandwidth high-sampling rate ADCs and DACs with low-jitter PLLs as the main

👥 作者与机构

periods (Ts and 2Ts). This duty cycle target estimation is common for all the slices, considering that slice-to-slice trigger point mismatch is very small.