A 131mW 6.4Gbps 256×32 Multi-User MIMO OTFS Detector for Next-Gen Communication Systems unit computes the soft information by piece-wise linear functions. The channel memory bank includes one channel-sample memory and one channel-difference memory for storing the encoded Gram matrix coefficients.

📋 论文概要

该论文提出了一种用于下一代通信系统的256×32多用户MIMO OTFS检测器，采用逐块对角线带均值计算并消除数据依赖性，实现了131mW功耗和6.4Gbps吞吐率。与逐行基线设计相比，所提架构达到了完全硬件利用率。

💡 主要创新点

• 提出基于逐块对角线带的均值计算方法，左下和右上块的均值分别利用前一层更新符号和预计算部分和来消除数据依赖性。
• 设计包含4个复数乘法累加单元的MCU，通过时分和顺序操作组合实现完全硬件利用率。

🏷 关键词

📄 原文摘要

The mean values are computed along the diagonal band of the submatrix in a block-byblock manner. It is noted that the mean values for the lower-left and upper-right blocks can be derived from the symbols updated in the preceding layer and pre-computed as partial sums, respectively, to eliminate data dependency. Compared with the row-wise baseline design, the proposed architecture achieves full hardware utilization. The MCU contains 4 complex-valued multiply-accumulate (CMAC) computation units, each including two sum units and two accumulation units for temporal and sequential operations, respectively. FFT and IFFT modules are included to efficiently perform circular convolutions in the DD domain. Moreover, the diagonal-like structure of both the lowerleft and upper-right blocks is well handled by hard-wired connection. Since the symbols are estimated more accurately as the MP detection progresses, the maximal input symbol

👥 作者与机构

Tang Lee, Ting-Yang Chen, I-Hsuan Liu, Chia-Hsiang Yang, Figure 2.6.4 shows the detailed architecture and optimization techniques for the MCU.