Vecim: A 289.13GOPS/W RISC-V Vector Co-Processor with Compute-in-Memory Vector Register File for Efficient High-Performance Computing

📋 论文概要

论文提出了一款名为Vecim的RISC-V向量协处理器，通过引入计算内存向量寄存器文件（Compute-in-Memory Vector Register File）来减少片上数据移动，解决了向量处理器中数据搬运开销大和外部内存带宽要求高的问题，实现了高效的高性能计算。

💡 主要创新点

• 首次将计算内存（CIM）技术应用于向量寄存器文件，减少向量处理器中频繁的数据移动开销。
• 基于RISC-V向量扩展架构，设计高能效的协处理器，实现了289.13 GOPS/W的峰值能效。
• 针对数据并行任务（ML、DSP、视觉）优化，在保持灵活性的同时接近专用设计的效率。

🏷 关键词

📄 原文摘要

Vector processors have re-emerged in high-performance computing and flagship mobile SoC designs for their improved programmability, appealing power efficiency over multicore processors and area efficiency over GPUs [1]. For modern data-parallel tasks (ML, DSP, vision), vector processors can approach the efficiency of custom designs, while maintaining the flexibility of CPUs and GPUs. However, there are still limitations to the widespread adoption of vector architectures in general-purpose systems: the expensive on-chip data movement, the high off-chip memory bandwidth requirement and the Vector Register File (VRF) complexity. This work, Vecim, presents Compute-in-Memory (CIM) as a microarchitecture technique to address the above limitations. A 1R1W SRAM VRF supporting all-digital in-memory INT8/BF16/FP16 multiplication and addition is first presented, eliminating the data movement between the VRF and ALU/FPU without increasing the complexity of the VRF

👥 作者与机构

Yipeng Wang, Mengtian Yang, Chieh-pu Lo, Jaydeep P. Kulkarni

University of Texas, Austin, TX