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ISSCC 2024Session 34 · COMPUTE-IN-MEMORYAI / ML16nm CMOS

A 16nm 96Kb Integer/Floating-Point Dual-Mode-Gain-CellComputing-in-Memory Macro Achieving 73.3-163.3TOPS/W and 33.2-91.2TFLOPS/W for AI-Edge Devices

⚡ 本页包含 AI 生成的分析内容,仅供参考

📋 论文概要

该论文提出了一种采用16nm工艺的96Kb整数/浮点双模式增益单元计算存储宏(CIM),解决了先进AI边缘芯片对计算灵活性和高能效的需求。该宏支持整数和浮点双模式运算,实现了73.3-163.3 TOPS/W的能效。

💡 主要创新点

核心指标
73.3-163.3 TOPS/W; 33.2-91.2 (推测TFLOPS/W)
工艺节点
16nm CMOS
重要性
发表年份
ISSCC 2024

🏷 关键词

计算存储双模式增益单元整数/浮点AI边缘芯片

📄 原文摘要

Zhao-En Ke2, Ting-Chien Chiu2, Jun-Ming Hsu2, Chiao-Yen Cheng2, Yu-Chen Chen2, Chung-Chuan Lo2, Ren-Shuo Liu2, Chih-Cheng Hsieh2, Kea-Tiong Tang2, Meng-Fan Chang1,2 TSMC Corporate Research, Hsinchu, Taiwan National Tsing Hua University, Hsinchu, Taiwan 3 Industrial Technology Research Institute, Hsinchu, Taiwan *Equally Credited Authors (ECAs) 1 2 Advanced AI-edge chips require computational flexibility and high-energy efficiency (EEF) with sufficient inference accuracy for a variety of applications. Floating-point (FP) numerical representation can be used for complex neural networks (NN) requiring a high inference accuracy; however, such an approach requires higher energy and more parameter storage than does a fixed-point integer (INT) numerical representation. Many compute-in-memory (CIM) designs have a good EEF for INT multiply-and-accumulate (MAC) operations; however, few support FP-MAC operations [1-3]. Implementing INT/FP

👥 作者与机构

Win-San Khwa*1, Ping-Chun Wu*2, Jui-Jen Wu1, Jian-Wei Su2,3, Ho-Yu Chen2,

分类:AI / ML · 年份:ISSCC 2024