A 22nm 64kb Lightning-Like Hybrid Computing-in-Memory Macro with a Compressed Adder Tree and Analog-Storage Quantizers for Transformer and CNNs

📋 论文概要

本文提出了一款基于22nm CMOS工艺的64kb混合计算内存宏单元，采用压缩加法树和模拟存储量化器技术，以提升神经网络中MAC运算的能效。该设计通过混合结构在SRAM中实现高效的计算存储一体化，显著降低了功耗。

💡 主要创新点

• 创新点1：提出压缩加法树结构，减少计算中的冗余操作，提升MAC运算效率。
• 创新点2：采用模拟存储量化器，实现高能效的模拟-数字混合计算。
• 创新点3：混合计算内存宏设计，结合数字与模拟优势，在22nm节点下实现64kb存储与闪电般的高速运算。

🏷 关键词

📄 原文摘要

Yuanpeng Zhang2, Jingmin Zhang1, Yuchen Tang1, Zhican Zhang1, Gang Chen3, Dawei Yang3, Zhaoyang Zhang1, Lizheng Ren1, Tianzhu Xiong1, Bo Wang1, Bo Liu1, Weiwei Shan1, Xinning Liu1, Hao Cai1, Guangyu Sun2, Jun Yang1, Xin Si1 Southeast University, Nanjing, China Peking University, Beijing, China, 3HOUMO, Beijing, China 1 2 SRAM-based computing-in-memory (CIM) has made significant progress in improving the energy efficiency (EF) of neural operators, specifically MAC, used in AI applications. Prior CIM methods have demonstrated attractive energy efficiencies (EF) under a fixed/less of accumulation length, sparsity, toggle rate, and bit precision [1-6]. Analog CIMs (ACIM) offer potentially higher EF but are susceptible to PVT variations. On the other hand, digital CIMs (DCIM) are robust but provide moderate energy efficiency. In prior weight-wise-cut structures [1], when processing INT8 MUL operations, a

👥 作者与机构

An Guo1, Xi Chen1, Fangyuan Dong1, Jinwu Chen1, Zhihang Yuan2,3, Xing Hu3,