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ISSCC 2024Session 34 · COMPUTE-IN-MEMORYAI / ML28nm

A 28nm 72.12TFLOPS/W Hybrid-Domain Outer-Product Based Floating-Point SRAM Computing-in-Memory Macro with Logarithm Bit-Width Residual ADC

⚡ 本页包含 AI 生成的分析内容,仅供参考

📋 论文概要

本文提出了一种基于混合域外积(Hybrid-Domain Outer-Product)的浮点SRAM存算一体宏,采用对数位表示(Logarithm Bit)以提升计算精度与能效。在28nm工艺下实现了72.12 TFLOPS/W的峰值能效,解决了边缘AI应用中浮点运算能效低、精度不足的问题。

💡 主要创新点

核心指标
72.12 TFLOPS/W
工艺节点
28nm
重要性
发表年份
ISSCC 2024

🏷 关键词

存算一体浮点运算高能效外积对数位表示

📄 原文摘要

Qirui Chen3, Meini Tang3, Xi Wei3, Zhixian Hou3, Jialiang Zhu1,2, Hao Wu1,2, Qirui Ren1,2, Guozhong Xing1, Pui-In Mak4, Feng Zhang1 Institute of Microelectronics of the Chinese Academy of Sciences, Beijing, China University of Chinese Academy of Sciences, Beijing, China 3 Beijing Institute of Technology, Beijing, China 4 University of Macau, Macau, China 1 2 SRAM-based computing-in-memory (CIM) is considered crucial to achieving high-energy efficiency (EF) for artificial-intelligence (AI) applications on edge devices. Researchers are currently exploring floating-point (FP) CIM [1,2], as integer (INT) precision CIMs [36] are no longer sufficient for new AI applications, which demand increased accuracy, complexity, and on-chip training. However, both analog and digital FP-CIMs face several significant challenges in realizing FP calculations, due to difficulties associated with handling high-bit precision: including (1) effectively combining the advantages of analog

👥 作者与机构

Yiyang Yuan1,2, Yiming Yang3, Xinghua Wang3, Xiaoran Li3, Cailian Ma1,2,

分类:AI / ML · 年份:ISSCC 2024