⚡ 本页包含 AI 生成的分析内容,仅供参考
本文提出了一种112Gb/s/pin单端串扰消除收发器,采用28nm CMOS工艺,实现了31dB的损耗补偿。该方案通过单端信号传输替代差分信号,提高了吞吐密度,并减少了功耗,适用于224Gb/s数据率需求。
computing and artificial intelligence applications pushes wireline transceivers to higher data rates. DSP-based transmitters (TX) and receivers (RX) have achieved 224Gb/s [1-2], but unfortunately consume substantial power. Furthermore, 224Gb/s SerDes places more stringent demands on the signal integrity of the passive components, such as connectors, channels, and packages. In contrast, the single-ended scheme may be a practical and cost-effective solution for 224Gb/s data rates. First, it doubles the throughput density by delivering two single-ended signals over one differential channel. Furthermore, this scheme relaxes the Nyquist bandwidth for the passive components. Unfortunately, single-ended links exhibit severe crosstalk,
Liping Zhong*, Hongzhi Wu*, Yangyi Zhang*, Xuxu Cheng, Weitao Wu,
Catherine Wang, Xiongshi Luo, Taiyang Fan, Dongfan Xu, Quan Pan Southern University of Science and Technology, Shenzhen, China *Equally Credited Authors (ECAs) The growing demand for cloud