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ISSCC 2024Session 7 · ULTRA-HIGH SPEED WIRELINEWireline I/O28nm CMOS

A 112Gb/s/pin Single-Ended Crosstalk-Cancellation Transceiver with 31dB Loss Compensation in 28nm CMOS

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📋 论文概要

本文提出了一种112Gb/s/pin单端串扰消除收发器,采用28nm CMOS工艺,实现了31dB的损耗补偿。该方案通过单端信号传输替代差分信号,提高了吞吐密度,并减少了功耗,适用于224Gb/s数据率需求。

💡 主要创新点

核心指标
112Gb/s/pin数据速率,31dB损耗补偿
工艺节点
28nm CMOS
重要性
发表年份
ISSCC 2024

🏷 关键词

单端收发器串扰消除损耗补偿112Gb/s

📄 原文摘要

computing and artificial intelligence applications pushes wireline transceivers to higher data rates. DSP-based transmitters (TX) and receivers (RX) have achieved 224Gb/s [1-2], but unfortunately consume substantial power. Furthermore, 224Gb/s SerDes places more stringent demands on the signal integrity of the passive components, such as connectors, channels, and packages. In contrast, the single-ended scheme may be a practical and cost-effective solution for 224Gb/s data rates. First, it doubles the throughput density by delivering two single-ended signals over one differential channel. Furthermore, this scheme relaxes the Nyquist bandwidth for the passive components. Unfortunately, single-ended links exhibit severe crosstalk,

👥 作者与机构

Liping Zhong*, Hongzhi Wu*, Yangyi Zhang*, Xuxu Cheng, Weitao Wu,

Catherine Wang, Xiongshi Luo, Taiyang Fan, Dongfan Xu, Quan Pan Southern University of Science and Technology, Shenzhen, China *Equally Credited Authors (ECAs) The growing demand for cloud

分类:Wireline I/O · 年份:ISSCC 2024