A 2.72fJ/conv 13b 2MS/s SAR ADC Using Dynamic Capacitive Comparator with Wide Input Common Mode

📋 论文概要

该论文提出了一种13位2MS/s的逐次逼近寄存器型模数转换器（SAR ADC），采用动态电容比较器，实现了2.72fJ/conv的能效。解决了高分辨率SAR ADC中比较器功耗呈指数增长的问题，适用于电池供电应用。

💡 主要创新点

• 提出动态电容比较器结构，通过电容耦合实现低功耗高分辨率比较。
• 设计宽输入共模范围，增强ADC在不同输入条件下的适应性。
• 采用动态预放大器技术（如NMOS动态偏置电荷泵或浮空反相放大器）进一步降低噪声和功耗。

🏷 关键词

📄 原文摘要

As SAR resolution increases, comparator power increases exponentially [1-2]. This problem should be mitigated, especially in battery-powered applications. Recent low power and noise comparators utilized dynamic pre-amplifiers [3-4] denoted as the NMOS dynamic bias with charge pump (NDBwCP) [3] and the floating inverter amplifier (FIA)

👥 作者与机构

Sewon Lee, Hyein Kang, Minjae Lee

Gwangju Institute of Science and Technology, Gwangju, Korea