An 8.62μW 75dB-DRSoC End-to-End Spoken-LanguageUnderstanding SoC with Channel-Level AGC and Temporal-Sparsity-Aware Streaming-Mode RNN

📋 论文概要

该论文提出了一款端到端口语理解SoC，功耗仅8.62μW，动态范围达75dB，集成了通道级自动增益控制和时间稀疏性感知处理，解决了传统ADC+DSP方案中模拟前端和数字特征提取器功耗过高的问题。

💡 主要创新点

• 提出通道级自动增益控制（AGC）技术，动态适应不同输入信号幅度，提升动态范围。
• 引入时间稀疏性感知处理，利用语音信号的稀疏特性降低计算功耗。
• 实现端到端模拟特征提取，避免传统ADC转换功耗，整体功耗降至8.62μW。

🏷 关键词

📄 原文摘要

Aalto University, Espoo, Finland 1 Voice-controlled IoT nodes and wearable devices require integrated real-time ultra-lowpower audio classification circuits to perform tasks such as Keyword Spotting (KWS) and Spoken Language Understanding (SLU). In conventional ADC+DSP implementations [1-2], the analog front-end (AFE) and digital feature extractor (FEx) together accounted for >50% of the system power. Analog FEx [3-9] reduces power by direct analog-to-feature conversion. Voltage-domain FEx [3-6] achieved <0.5μW power but only demonstrated <6 classes KWS. Time-domain FEx [7-9] achieved 86%-to-91.5% KWS accuracy with 10-to-12 classes but needed amplitude-normalized input or a costly off-chip classifier. In addition, prior designs [1-10] were limited to single-word audio inputs and did not consider continuous speech inputs required by SLU. Real-world operation also requires >60dB input range to cope with the variation of speech volume [11] and the speaker distance from the

👥 作者与机构

Sheng Zhou1, Zixiao Li1, Tobi Delbruck1, Kwantae Kim2, Shih-Chii Liu1

University of Zurich and ETH Zurich, Zurich, Switzerland