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ISSCC 2025Session 13 · COOL COMPUTATION CIRCUITSOther

An 18.5μW/qubit Cryo-CMOS Charge-Readout IC Demonstrating QAM Multiplexing for Spin Qubits

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📋 论文概要

本文提出了一种用于自旋量子比特的低温CMOS电荷读出集成电路,采用QAM复用技术实现多个量子比特的同时读取。该芯片功耗仅18.5μW/量子比特,解决了大规模量子比特读取中的功耗和面积挑战。

💡 主要创新点

重要性
发表年份
ISSCC 2025

🏷 关键词

低温CMOS自旋量子比特电荷读出QAM复用低功耗

📄 原文摘要

Tristan Meunier2, Jean-Baptiste Casanova3, Xavier Jehl4, Yvain Thonnart3, Franck Badets1 CEA-Léti, Grenoble, France Quobly, Grenoble, France 3 CEA-List, Grenoble, France 4 CEA-Pheliqs, Grenoble, France 1 2 Spin qubits are a promising candidate for large-scale fault-tolerant quantum computing due to <1µm² footprint per qubit, higher operating temperature (up to 1K [1]) and possible compatibility with industrial CMOS processes [2, 3]. However, the need for a simultaneous ~µs readout of thousands of devices is especially challenging in terms of power consumption and footprint per qubit [4, 5]. Frequency-domain multiplexed (FDM) reflectometry architectures using cryo-CMOS have been introduced in [6, 7, 8] but these circuits require bulky >100µm² inductors and do not match readout time specifications using actual quantum devices. Besides, current integrator readout schemes have been proposed [9, 10], but offer no scaling perspectives beyond time-domain multiplexing,

👥 作者与机构

Quentin Schmidt1, Baptiste Jadot1, Brian Martinez1, Antoine Faurie1,

分类:Other · 年份:ISSCC 2025