A 22nm 104.5TOPS/W µ-NMC-∆-IMC Heterogeneous STT-MRAM CIM Macro for Noise-Tolerant Bayesian Neural Networks

📋 论文概要

该论文提出了一种基于22nm工艺的异构STT-MRAM计算存储宏，采用µ-NMC-∆-IMC架构，实现了104.5TOPS/W的高能效，专门用于抗噪声贝叶斯神经网络，解决了边缘AI设备中图像识别应用的能效和噪声容忍问题。

💡 主要创新点

• 首次将异构STT-MRAM与µ-NMC-∆-IMC架构结合，实现高能效计算存储一体化。
• 针对贝叶斯神经网络的噪声容忍特性，优化了CIM宏的设计，提升了推理精度。

🏷 关键词

📄 原文摘要

Yu-Cheng Hung1, Yi-Ming Li1, Yu-Hui Wang1, Chung-Chuan Lo1, Ren-Shuo Liu1, Kea-Tiong Tang1, Chih-Cheng Hsieh1, Yu-Der Chih4, Tsung-Yung Jonathan Chang4, Meng-Fan Chang1,2 National Tsing Hua University, Hsinchu, Taiwan TSMC Corporate Research, Hsinchu, Taiwan 3 TSMC Corporate Research, San Jose, CA 4 TSMC, Hsinchu, Taiwan 1 2 *Equally Credited Authors (ECAs) Compute-in-memory (CIM) macros [1-5] for convolutional neural networks (CNNs) [6-7] and vision transformers (ViTs) [8] enable high-performance computing for energy-efficient edge-AI devices. Image recognition applications are constrained by inference accuracy degradation or misjudgments due to environmental noise. Bayesian neural networks (BNNs)

👥 作者与机构

De-Qi You*1, Win-San Khwa*2, Bo Zhang3, Fang-Yi Chen1, Andrew Lee1,