A 16nm 216kb, 188.4TOPS/W and 133.5TFLOPS/W Microscaling Multi-Mode Gain-Cell CIM Macro Edge-AI Devices loss of accuracy. In HV mode, the M2-IPU aligns INM based on both ∆PDE and ∆PDSS, with extra shifting in INM from ∆PDSS, which increases INM sparsity, further enhancing EEF. In phase 2 (Ph2), the OUT-PRO processes the activation function of the M2-CIM outputs and

📋 论文概要

本文提出一种基于16nm工艺的216kb多模式显微缩放增益单元计算存储一体化（CIM）宏，用于边缘AI设备。该宏通过创新的显微缩放和混合模式操作，在保持精度的情况下实现了188.4TOPS/W和133.5TFLOPS/W的高能效。

💡 主要创新点

• 提出了一种多模式显微缩放（Microscaling）技术，在CIM宏中支持多种数值精度和操作模式，兼顾能效与精度。
• 采用增益单元（Gain-Cell）结构，结合高效的预充电和转换电路（如PAH-ADT），实现低功耗、高吞吐的模拟计算。

🏷 关键词

📄 原文摘要

as the SS pre-processing circuit in Ph0, as the EXP processing circuit in Ph1, and as the FP2MX converter in Ph3. Win-San Khwa*1, Ping-Chun Wu*2, Jian-Wei Su2,3, Chiao-Yen Cheng2, Jun-Ming Hsu2, Yu-Chen Chen2, Le-Jung Hsieh2, Jyun-Cheng Bai2, Yu-Sheng Kao2, Tsung-Han Lou2, Ashwin Sanjay Lele4, Jui-Jen Wu1, Jen-Chun Tien2, Chung-Chuan Lo2, Ren-Shuo Liu2, Chih-Cheng Hsieh2, Kea-Tiong Tang2, Figure 14.2.3 illustrates the structure and operation of the PAH-ADT. A conventional 28T Meng-Fan Chang1,2 TSMC Corporate Research, Hsinchu, Taiwan 2 National Tsing Hua University, Hsinchu, Taiwan 3 Industrial Technology Research Institute, Hsinchu, Taiwan 4 TSMC Corporate Research, San Jose, CA 1 *Equally Credited Authors (ECAs) The evolution of AI workloads demands ever higher resolutions, multiple data-format compatibility, and high-energy efficiency (EEF). Integer (INT) CIM macros [1-13,24] enable high-EEF MAC operations at the cost of limited accuracy. Floating-point (FP) CIMs [14-21]

👥 作者与机构

generates INs for the next layer. In phase 3 (Ph3), the M2-IPU converts FP INs of the, subsequent layer to MX format. Note that macro’s AEF is enhanced by reusing the M2-IPU