A Fully Dynamic Noise-Shaping SAR ADC Achieving 120dB SNDR and 189dB FoMS in 1kHz BW *Equally Credited Authors (ECAs) An issue of 3-level switching is that it suffers from nonlinearity caused by VCM error. As shown in Fig. 18.1.3, without VCM error, the asymmetric capacitor mismatch in a differential 3-level DAC only causes an offset (common-mode mismatch). But with VCM error, the characteristic curve of DAC becomes nonlinear. This nonlinearity mainly introduces the 2nd-order harmonic distortion, as the VCM usage is a bilaterally symmetry pattern versus DAC input value. This nonlinearity can be neatly solved by the system-level chopping. When the polarity of chopping signal is reversed, the DAC mismatch is also reversed. In this manner, the differential DAC mismatch is averaged out, as well as the offset caused by asymmetric DAC mismatch. In this design, the VCM voltage is generated by two 2.5MΩ off-chip resistors. High-resolution ADCs with micro power and kHz-level BW have wide applications in portable instrumentation, implantable devices and smart sensors. To enhance flexibility and improve energy efficiency, many systems require duty-cycled operation and expect power scaling

📋 论文概要

该论文提出了一种全动态噪声整形SAR ADC，通过创新的电路设计实现了120dB SNDR和189dB FoMS，在1kHz带宽内解决了传统高精度ADC功耗高、信号带宽受限或校准复杂的问题。

💡 主要创新点

• 采用全动态电路架构，消除了静态功耗，显著提升能效。
• 通过噪声整形技术将量化噪声整形至带外，实现高分辨率。
• 无需复杂的增益和电容校准，降低了硬件成本。

🏷 关键词

📄 原文摘要

THD of -116dB, and it consumes high power due to the 4th-order loop filter. The zoom ADC in [2] combining with a coarse SAR and a fine DSM achieves 119.8dB SNR, but it can only process DC signals. The dynamic zoom ADCs [3-5] solve the signal BW issue by updating the reference for DSM, however their energy efficiency is not fully exploited due to over-ranging and low quantization resolution (<5b) limited by DWA. Multi-step SAR ADCs [6,7] can achieve >100dB SNDR by employing residue amplification, but the hardware cost required for gain and capacitor calibrations is non-trivial. NS-SAR ADCs [8-12] can achieve high energy efficiency by introducing noise shaping capability to SAR ADCs, but their SNDRs are limited to around 90~105dB. Besides, most of the ADCs with >100dB SNDR rely on static amplifiers, resulting in high static power. The closed-loop FIA is used to realize the integrator, as shown in Fig. 18.1.3. Note that the

👥 作者与机构

with speed. State-of-the-art high-resolution ADC solutions include DSMs, zoom, SAR and, noise-shaping (NS) SAR ADCs. The DSM in [1] achieves a high DR of 136dB but limited