⚡ 本页包含 AI 生成的分析内容，仅供参考
本文介绍了IBM Telum II微处理器，针对zNext系统重新设计，实现了5.5GHz的工作频率。该处理器集成了片上数据处理单元并改进了AI加速器，旨在提升系统性能和容量。
Michael Becht2, Eduard Herkel5, Matthias Pflanz5, Pat Meaney2, Michael Romain2, Mark Cichanowski1, Amanda Venton1, David Wolpert2, Elazar Kachir4, Luke Hopkins2, Tim Bubb2, Andreas Arp5, Daniel Kiss5, Simon Büchsenstein5, Michael Wood2, Michael Spear1, Robert Sonnelitter2, Rajiv Joshi6 IBM Systems, Austin, TX IBM Systems, Poughkeepsie, NY 3 IBM Systems, Bangalore, India 4 IBM Systems, Tel Aviv, Israel 5 IBM Systems, Böblingen, Germany 6 IBM Research, Yorktown Heights, NY 1 2 The IBM Z microprocessor, Telum II, has been redesigned for the zNext system to improve performance and system capacity over the previous z16 system [1]. The system topology consists of four Dual-Chip Modules (DCM), each composed of two central-processor (CP) chips per drawer. The system can be configured with up to four drawers and a total of 32 CP chips in a fully coherent shared memory system. The CP (Fig. 2.2.7) is a 600mm2 die
Gerald Strevig1, Chris Berry2, Rahul Rao3, Noam Jungmann4, Michael Sperling2,