A 380µW and -242.8dB FoM Digital-PLL-Based GFSK Modulator with sub-20µs Settling Frequency Hopping for Bluetooth Low-Energy in 22nm CMOS

📋 论文概要

该论文提出了一种基于数字锁相环（DPLL）的GFSK调制器，适用于蓝牙低功耗（BLE）通信，实现了380µW的超低功耗和-242.8dB的FoM，并支持亚20µs建立时间的自适应跳频，有效降低了干扰。

💡 主要创新点

• 实现了极低功耗（380µW）的DPLL基GFSK调制器，同时达到-242.8dB的高FoM。
• 提出亚20µs建立时间的频率跳频机制，满足BLE自适应跳频要求。
• 在数字PLL架构中优化了调制与跳频性能，兼顾低功耗与快速建立。

🏷 关键词

📄 原文摘要

Saleh Karman2, Andrea Leonardo Lacaita1, Salvatore Levantino1 Politecnico di Milano, Milan, Italy Infineon Technologies, Villach, Austria 1 2 *Equally Credited Authors (ECAs) Ultra-low power (ULP) Bluetooth Low-Energy (BLE) transceivers (TRXs) are crucial for a wide range of battery-powered devices, including IoT nodes, sensors, and wearables. A BLE TRX should support GFSK modulation for BLE-packet transmission and adaptive frequency hopping (AFH), i.e., randomly jumping within the 2.402-to-2.480GHz BLE band, for minimizing interference from nearby wireless devices. Recently, digital-PLL (DPLL)-based GFSK modulators have gained traction for realizing ULP BLE TRXs [1-6]; however, achieving ULP, rapid frequency hopping, and low FSK error simultaneously remains challenging. A single-point modulated DPLL (Fig. 34.2.1 top-left) requires a wide BW [1], and, in turn, a wide-range time-to-digital converter (TDC) [2,3] and/or a high reference frequency [1]. Both

👥 作者与机构

Simone Mattia Dartizio*1, Giacomo Castoro*1, Stefano Gallucci*1,

Michele Rossoni1, Riccardo Moleri1, Francesco Tesolin1, Pietro Salvi1,