⚡ 本页包含 AI 生成的分析内容，仅供参考
本文提出一款在28nm CMOS工艺上实现的112Gb/s PAM-4线性跨阻放大器(TIA)，支持扩展光电探测器(PD)与TIA之间的距离，解决了共封装光模块中PD与TIA因热膨胀约束导致的距离受限问题，实现了0.61pJ/b的低功耗高性能传输。
artificial intelligence applications pushes optical communications to higher data rates and lower cost. Co-packaging the PD, BiCMOS TIA, and CMOS switch ASIC on the same substrate can effectively improve signal integrity and reduce power consumption, improving integration density and reducing the cost [1-2]. Integrating the TIA into the switch ASIC in CMOS can further reduce the total component counts, achieving lower cost and power consumption [3], as shown in Fig. 36.6.1 (top left). A reasonable distance from the PD to TIA+ASIC is needed to circumvent the constraints of the ASIC thermal expansion, the optical coupling flexibility, the mechanical stability, and field replacement caused by short PD-TIA reach, as shown in the table of Fig. 36.6.1 (middle
Yangyi Zhang*, Zhenyu Yao*, Wentao Zhou*, Xiongshi Luo, Zhenghao Li,
Dongshen Zhan, Quan Pan Southern University of Science and Technology, Shenzhen, China *Equally Credited Authors (ECAs) The growing demand for cloud storage and