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ISSCC 2025Session 36 · ULTRA-HIGH-DENSITY D2D AND HIGH-PERFORMANCE OPTICAL TRANSCEIVERSRF & Wireless5nm CMOS

A 212Gb/s PAM-4 Retimer with Integrated High-Swing Optical Driver and Chip-to-Module Long Reach Capability of 40dB in 5nm FinFET

⚡ 本页包含 AI 生成的分析内容,仅供参考

📋 论文概要

本文提出了一款212Gb/s PAM-4重定时器,集成了高摆幅光驱动器,支持芯片到模块的40dB长距离传输,采用5nm工艺,旨在满足AI/ML应用对更高I/O吞吐量的需求。

💡 主要创新点

核心指标
212Gb/s PAM-4, 40dB reach
工艺节点
5nm CMOS
重要性
发表年份
ISSCC 2025

🏷 关键词

PAM-4重定时器光驱动器5nm工艺长距离传输

📄 原文摘要

C Abidin2, C Loi4, D Cartina5, H Lo1, I Fabiano6, J Riani1, J H Teo4, J Q Wang1, K Raviprakash1, K K Ravi Prakash1, L Cai4, L Patra1, M Bachu1, N Codega6, N Shivashankar1, S Ray1, S Chong4, S Jafarlou2, S Yu4, T-F Wu2, W Y Neo4, X Ding4, Y Wang4, Z Yan1, Z Sun4, S Jantzi2, L Tse1, K Chang1 Marvell, Santa Clara, CA Marvell, Irvine, CA 3 Marvell, Ottawa, Canada 4 Marvell, Singapore, Singapore 5 Marvell, Burnaby, Canada 6 Marvell, Pavia, Italy 1 2 An increasing need for higher throughput driven by artificial intelligence (AI) and machine learning (ML) applications, makes faster I/O interfaces with lower power consumption essential. Top-of-rack switches in hyperscalers now require data rates of 200Gb/s per lambda while adhering to the power budget dictated by multi-source agreements (MSA) such as OSFP-XD. Eliminating extra components like an external laser driver is crucial as it not only reduces power consumption but also minimizes development cost and form factor.

👥 作者与机构

V Gurumoorthy1, A Tan1, A Iyer1, A Fan2, A Farhoodfar1, B Alnabulsi3, B Helal1,

分类:RF & Wireless · 年份:ISSCC 2025