Monolithic In-Memory Computing Microprocessor for End-to-End DNN Inferencing in MRAM-Embedded 28nm CMOS Technology with 1.1Mb Weight Storage

📋 论文概要

本论文提出了一种基于MRAM嵌入式28nm CMOS工艺的单片内存计算微处理器，用于端到端深度神经网络推理。该设计针对始终开启的AI传感器应用中的稀疏推理需求，通过非易失性存储器交叉阵列实现低功耗计算，解决了传统架构在空闲和计算阶段功耗过高的问题。

💡 主要创新点

• 在28nm CMOS工艺中单片集成MRAM内存计算阵列与微处理器，实现端到端DNN推理。
• 利用非易失性存储器交叉阵列的存内计算能力，显著降低稀疏推理场景下的功耗。
• 面向始终开启的AI传感器应用优化，兼顾计算阶段和空闲阶段的低功耗需求。

🏷 关键词

📄 原文摘要

Hyungwoo Lee1, Wooseok Yi1, Seungchul Jung1, Daekun Yoon1, Shinhee Han3, Saeyoon Chung3, Kilho Lee3, Jeong-Heon Park3, Kangho Lee3, Sang Joon Kim1, Donhee Ham1,4 Samsung Advanced Institute of Technology, Suwon, Korea Seoul National University, Seoul, Korea 3 Samsung Electronics, Giheung, Korea 4 Harvard University, Cambridge, MA 1 2 Always-on AI sensor applications––based on deep neural networks (DNNs)––with sparse inference require low power consumption during both computing and idle phases. Inmemory computing (IMC) with non-volatile memory crossbar arrays could meet this demand. Concretely, the co-location of memory (DNN weight storage) and computing (analog matrix multiplications (MMs)) in crossbar arrays obviates the need to shuttle weight data, thus reducing the computing power consumption, while the use of the non-volatile memory minimizes the power consumption during idle states. Resistive, phase-change,

👥 作者与机构

Soonwan Kwon1,2, Sungmeen Myung1, Jangho An1, Hyunsoo Kim1, Minje Kim1,