← 返回论文列表 📄 下载原文 PDF  ISSCC 2025 · 37.7
ISSCC 2025Session 37 · DESIGN-TECHNOLOGY OPTIMIZATION AND DIGITAL ACCELERATORSDigital Circuits28nm

A 28nm 18.1µJ/Acquisition End-to-End GPS Acquisition Accelerator with Energy-Accuracy-Driven Mixed-Radix IFFT and ROM-Assisted Computing

⚡ 本页包含 AI 生成的分析内容,仅供参考

📋 论文概要

该论文提出了一种用于GPS信号捕获的端到端加速器,采用28nm工艺,通过能量-精度驱动的混合基IFFT和ROM结构,实现了18.1µJ/次捕获的低功耗性能。解决了传统GPS捕获中计算量大、能效低的问题。

💡 主要创新点

核心指标
18.1µJ/Acquisition
工艺节点
28nm
重要性
发表年份
ISSCC 2025

🏷 关键词

GPS捕获加速器混合基IFFT能量-精度驱动ROM阵列低功耗

📄 原文摘要

Columbia University, New York, NY 1 (Fig. 37.7.3, top). The butterfly unit receives 8 real inputs and 8 imaginary inputs in signand-magnitude format, through an input router switching between them. When real (imaginary) inputs are fed into the real (imaginary) ROM arrays, 8 real outputs are generated; conversely, when real (imaginary) inputs are fed into the imaginary (real) ROM arrays, 8 imaginary outputs are produced. The final radix-16 stage is divided into 4 parts, where each part processes 8 inputs and generates 8 outputs using the radix-8 butterfly unit. The results from the butterfly unit are then combined in subsequent cycles to complete the radix-16 computation. 2 A global positioning system (GPS) is now essential in many mobile devices, but its extensive energy consumption imposes a major design challenge. The most computationally intensive task in a GPS receiver is acquisition [1]. The intermediate frequency (IF) signal from the RF

👥 作者与机构

Sangsu Jeong1, Sungjin Park1, Mingoo Seok2, Dongsuk Jeon1

Seoul National University, Seoul, Korea

分类:Digital Circuits · 年份:ISSCC 2025