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ISSCC 2025Session 8 · DIGITAL TECHNIQUES FOR SYSTEM ADAPTATION, POWER MANAGEMENT AND CLOCKINGDigital Circuits

A Dynamically Reconfigurable Digital-Integrated Voltage-Regulator Fabric for Energy-Efficient DVFS in Multi-Domain SoCs

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📋 论文概要

该论文提出了一种动态可重构的数字集成电压调节器架构,通过将Buck稳压器与LDO稳压器结合,实现了多域SoC中高效细粒度的动态电压频率缩放(DVFS)。该架构解决了传统Buck稳压器需要大体积无源器件难以集成的问题,同时提升了能量效率。

💡 主要创新点

重要性
发表年份
ISSCC 2025

🏷 关键词

电压调节器动态电压频率缩放多域SoC

📄 原文摘要

Regulator (VR) architecture (Fig. 8.3.1), using Buck regulators to each drive a group of Low Dropout (LDO) regulated domains. The domain with the highest Vdd requirement within each group – the critical domain – sets the voltage of its corresponding Buck rail. Such an architecture combines the complementary advantages of Buck and LDO regulators to enable efficient fine-grained Dynamic Voltage and Frequency Scaling (DVFS). Buck regulators [1-7] offer efficient supplyvoltage (Vdd) scaling, but they require bulky passive components which hinder integration and restrict their use to only limited numbers. In contrast, LDOs [8-13] are highly compact but incur significant losses due to the resistive voltage drop across their header devices. Domain grouping is performed at design time to maximize aggregate VR efficiency across

👥 作者与机构

Julian Arenas, Chi-Hsiang Huang, Kevin Patino-Sosa, Jung-Jin Park,

Hikmet Seha Ozturk, Visvesh Sathe Georgia Institute of Technology, Atlanta, GA Energy efficient SoCs frequently employ a hierarchical Voltage

分类:Digital Circuits · 年份:ISSCC 2025