⚡ 本页包含 AI 生成的分析内容,仅供参考
该论文提出了一种基于列二分图拓扑的数字Ising芯片COBI,在65nm工艺下实现了56度密集连接的自旋处理单元和8位自旋系数存储,用于高效求解组合优化问题。芯片集成了64个自旋处理单元,并通过嵌入式SRAM存储系数,成功应用于MIMO检测,求解时间小于72纳秒。
Abstract We present a 65nm digital Ising chip with an advanced column-bipartite topology, featuring densely connected spins with a degree of 56 and 8b coefficients for mapping and solving computationally intensive combinatorial optimization problems. A fabricated Ising test chip with 64 spin processing elements with spin coefficients stored in flexible embedded SRAM demonstrates solving practical problems, such as MIMO detection for a wireless network, with a fast solution time (<72ns). Combinatorial optimization problems (COPs) are prevalent in various industries, including logistics, networks, finance, drug discovery and wireless communications. Many of these problems are NP-hard and scale poorly on conventional CPUs and GPUs. Ising machines provide a promising alternative by mapping COP variables onto Ising spins, where spin interactions encode the energy function. The system then searches for low-energy states
Yihao Wu1, Jooyoung Bae1, Seunghun Shin2, Bongjin Kim2
University of California, Santa Barbara, CA, 2Korea Advanced Institute of Science and Technology, Daejeon, Korea